library verilog;
use verilog.vl_types.all;
entity cmsdk_mcu_pin_mux is
    port(
        uart0_rxd       : out    vl_logic;
        uart0_txd       : in     vl_logic;
        uart0_txen      : in     vl_logic;
        uart1_rxd       : out    vl_logic;
        uart1_txd       : in     vl_logic;
        uart1_txen      : in     vl_logic;
        uart2_rxd       : out    vl_logic;
        uart2_txd       : in     vl_logic;
        uart2_txen      : in     vl_logic;
        uart0_RX        : inout  vl_logic;
        uart0_TX        : inout  vl_logic;
        timer0_extin    : out    vl_logic;
        timer1_extin    : out    vl_logic;
        p0_in           : out    vl_logic_vector(15 downto 0);
        p0_out          : in     vl_logic_vector(15 downto 0);
        p0_outen        : in     vl_logic_vector(15 downto 0);
        p0_altfunc      : in     vl_logic_vector(15 downto 0);
        p1_in           : out    vl_logic_vector(15 downto 0);
        p1_out          : in     vl_logic_vector(15 downto 0);
        p1_outen        : in     vl_logic_vector(15 downto 0);
        p1_altfunc      : in     vl_logic_vector(15 downto 0);
        i_trst_n        : out    vl_logic;
        i_swditms       : out    vl_logic;
        i_swclktck      : out    vl_logic;
        i_tdi           : out    vl_logic;
        i_tdo           : in     vl_logic;
        i_tdoen_n       : in     vl_logic;
        i_swdo          : in     vl_logic;
        i_swdoen        : in     vl_logic;
        P0              : inout  vl_logic_vector(15 downto 0);
        P1              : inout  vl_logic_vector(15 downto 0);
        nTRST           : in     vl_logic;
        TDI             : in     vl_logic;
        SWDIOTMS        : inout  vl_logic;
        SWCLKTCK        : in     vl_logic;
        TDO             : out    vl_logic
    );
end cmsdk_mcu_pin_mux;
